How Chip Stacking Became Huawei's Weapon in the AI War

In a prominently placed interview with China's state newspaper, Huawei founder Ren Zhengfei sent a clear message to Washington: US export controls aimed at crippling China's tech ambitions are not the knockout blow they were intended to be. Ren asserted that domestic firms could resort to methods like chip packaging or stacking to achieve performance comparable to that of more advanced silicon, effectively dismissing the impact of a multi-year US campaign to cut off China's access to cutting-edge chip technology.

His comments, arriving amidst sensitive trade negotiations between the US and China, highlight a critical shift in the global semiconductor battle. While the US focuses on controlling access to the most advanced manufacturing processes, China is doubling down on a different front: innovating in how chips are put together. This strategy aims to create powerful systems by combining multiple less-advanced chips, posing a direct challenge to the notion that the country with the best fabs automatically wins the AI race.

Why is China turning to advanced packaging?

The core of the US strategy has been to deny China access to the bleeding edge of semiconductor manufacturing. This is achieved by restricting sales of the most advanced AI chips from companies like Nvidia and, crucially, by blocking the sale of Extreme Ultraviolet (EUV) lithography machines from Dutch firm ASML, which are essential for producing chips at the 5-nanometer node and below.

This creates a "technology gap." China’s top foundry in the mainland, SMIC, can produce chips at a 7nm process and is expected to achieve a 5nm process by end of 2025. But this is several generations behind the 3nm and 2nm nodes used by industry leader TSMC. For high-performance computing and AI, this gap translates to a significant disadvantage in raw power and efficiency from a single chip. Advanced packaging offers a workaround. By cleverly connecting multiple 7nm chiplets, China can create a single, more powerful processor system that aims to bridge the performance gap with a monolithic chip made on a more advanced node.

What are chip packaging and stacking?

Traditionally, chip packaging was simply about protecting a single silicon die and connecting it to a circuit board. Advanced packaging, however, is a fundamental shift in chip design and manufacturing. Instead of relying on a single, large, monolithic chip, this approach breaks down functions into smaller, specialized chips called "chiplets." These chiplets can then be combined in sophisticated ways. The two main techniques are:

Chip Stacking (3D Packaging): This involves placing dies vertically on top of one another. The most common example is High-Bandwidth Memory (HBM), where multiple memory dies are stacked to create a dense, high-speed memory block that sits right next to a processor. This dramatically reduces the distance data has to travel, boosting speed and power efficiency.

Chiplet Integration (2.5D Packaging): This involves placing multiple chiplets side-by-side on a silicon base, or "interposer," which contains intricate wiring to connect them. This allows chipmakers to mix and match chiplets made on different manufacturing processes. TSMC's Chip-on-Wafer-on-Substrate (CoWoS) is a leading technology in this space and is critical to how Nvidia's high-end GPUs are made.

Think of it as the difference between building one massive, complex skyscraper (a monolithic advanced chip) versus constructing a tightly integrated city block of specialized, interconnected buildings (a chiplet-based system). Huawei is betting it can build a powerful city block using its 7nm or 5nm technology to compete with the skyscrapers being built by TSMC.

Is this strategy actually working for Huawei?

Evidence suggests it is making significant progress. The release of Huawei’s Mate 60 smartphone in 2023, powered by a 7nm chip manufactured by SMIC, stunned Washington and demonstrated China's resilience. In the AI space, Huawei is aggressively pushing its Ascend series of AI accelerators, like the 910B and 910C.

Rather than selling just individual chips, Huawei is promoting powerful systems that leverage packaging. Its CloudMatrix 384, for instance, is a computing system that connects 384 of its Ascend 910C chips together with an advanced optical network. This approach allows Huawei to compete with Nvidia at a system level, even if its individual chips are less powerful or efficient. The strategy is gaining traction; Nvidia CEO Jensen Huang has acknowledged that Huawei has become "one of the most formidable technology companies in the world."

What are the limitations and challenges?

This strategy is a clever workaround, not a perfect substitute. There are significant trade-offs:

Power and Efficiency: A system of bundled chiplets is almost always less power-efficient than a single, highly-advanced monolithic chip. Data from analysts shows that while Huawei's CloudMatrix system may deliver impressive raw performance, it consumes significantly more power per FLOP than Nvidia's equivalent GB200 NVL72 rack. For data centers where power is a massive operational cost and physical constraint, this is a major drawback.

Manufacturing Complexity: Advanced packaging is its own technological frontier, and TSMC is the undisputed leader. While China is investing heavily, achieving high yields and the required precision to connect hundreds of chips reliably is a huge challenge for SMIC and other domestic players like SiCarrier.

The Software Moat: Physically connecting chips is only half the battle. Making them work together seamlessly as a single, powerful processor requires an immensely complex software stack. Nvidia's CUDA platform represents a nearly two-decade head start in this area, creating a deep ecosystem of tools, libraries, and developer expertise. Huawei is building its own equivalent, CANN, but closing this software gap is arguably a greater challenge than the hardware itself.

What does this mean for the global chip war?

Huawei's focus on packaging signals that the battle for semiconductor supremacy is becoming more multifaceted. It's no longer just about who has access to the latest EUV machine. The ability to design sophisticated chiplet systems and master advanced packaging techniques has become a critical competitive vector.

This development puts the US in a difficult position. Its export controls, while successfully limiting China's access to leading-edge nodes, have inadvertently accelerated China’s innovation in other crucial areas. The chip war is expanding from the fabrication plant to the design and packaging houses, creating a more complex and fragmented technological landscape that is proving much harder to control.

Reference Shelf:

Huawei Founder Waves Off US Chip Curbs While Trade Talks Proceed (Bloomberg)

SMIC and Huawei could use quadruple patterning for China-made 5nm chips: Report (Tom's Hardware)

Why ASML and TSMC Are the Chokepoints in Global Chipmaking (ARPU)